本論文分析印度塔塔電子（TEPL）與台灣力晶積體電路製造股份有限公司（PSMC，簡稱力積電）為建立印度首座晶圓廠所形成的戰略夥伴關係。本文旨在探討兩家公司合作的原因、印度自2016年至2025年的政策如何形塑此一投資案，以及其所面臨的挑戰。本研究採用「所有權－區位－內部化」（OLI）理論框架與「新制度經濟學」（NIE），對公開文件進行質性分析，以理解此合作案背後的戰略與制度性驅動因素。
研究結果顯示，此合作關係運用了塔塔電子的財務實力與力積電的技術授權模式。設廠地點的選擇則受惠於高額的政府補助和旨在降低風險的專門工業園區。然而，進入一個未經考驗的半導體市場所伴隨的風險，加上基礎設施的不足（如穩定的電力與水源供應）及智慧財產權保護的薄弱（尤其與已開發國家相比），再結合力積電自身較弱的財務狀況，這些因素解釋了為何力積電選擇技術授權，而非直接投資。透過與台灣模式的比較，研究進一步揭示了印度在研發（R&D）資金、教育經費及政策一致性等方面的不足。
本研究結論指出，雖然印度現行的策略能吸引到初期的投資案，但要取得長期成功，必須克服這些根本性的基礎設施與制度障礙，並採取非保護主義的方針，才能建立一個健全的半導體生態系。

This thesis analyses the strategic partnership between India's Tata Electronics (TEPL) and Taiwan's Powerchip Semiconductor Manufacture Corporation (PSMC) to establish India's first chip-making semiconductor fabrication plant. It investigates why these firms collaborated, how Indian policies from 2016 to 2025 shaped the venture, and what challenges it faces. Using the Ownership, Location, and Internalisation (OLI) and New Institutional Economics (NIE) frameworks, this study qualitatively analyses public documents to understand the collaboration's strategic and institutional drivers.
The findings reveal the partnership leverages TEPL’s financial strength and PSMC’s licensing-based technology. The location choice was driven by substantial government subsidies and dedicated industrial zones aimed at lowering risk. However, the risks of entering an untried semiconductor market, coupled with infrastructural gaps such as stable power and water supply and weak intellectual property protection, especially compared with developed countries, along with its weak financial position explain why PSMC opted for technology licensing instead of direct investment. A comparison with Taiwan’s model further reveals India’s deficits in research and development (R&D) funding, education funding, and policy consistency.
The study concludes that while India's current strategy can attract initial projects, long-term success requires overcoming these fundamental infrastructural and institutional hurdles and having a non-protectionist approach to build a robust semiconductor ecosystem.

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